Binary Calculator
Add, subtract, multiply or divide two binary numbers, apply bitwise logic (AND, OR, XOR, NOT, NAND, NOR), shift or rotate bits, or convert between decimal and two's complement — at 8, 16, 32 or 64-bit word size.
Written by Suhaib Hassan. Every operation follows the standard binary arithmetic and IEEE-style bitwise rules. Our methodology.
Arithmetic and bitwise operations use exact BigInt math masked to your chosen register width, so overflow and sign behavior match real hardware registers exactly.
It shows binary, decimal and hex side by side, plus the two's complement interpretation — the three things that trip people up most.
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Bit-by-bit view
Each bit of the result, grouped in nibbles.
Step-by-step working
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Bitwise truth tables
Every gate, for one bit.
| A | B | AND | OR | XOR | NAND | NOR |
|---|---|---|---|---|---|---|
| 0 | 0 | 0 | 0 | 0 | 1 | 1 |
| 0 | 1 | 0 | 1 | 1 | 1 | 0 |
| 1 | 0 | 0 | 1 | 1 | 1 | 0 |
| 1 | 1 | 1 | 1 | 0 | 0 | 0 |
Two's complement, briefly
Two's complement represents negative numbers so that addition and subtraction work identically for signed and unsigned values in hardware. To negate a value: flip every bit, then add 1. The top bit acts as the sign: 0 for non-negative, 1 for negative.
Shift types
- LSL / LSR (logical shift left/right): bits shifted in are always 0.
- ASR (arithmetic shift right): preserves the sign bit — used for signed division by powers of two.
- ROL / ROR (rotate): bits that fall off one end wrap around to the other.
By Suhaib Hassan · Reviewed 29 September 2026 · How CalculatePilot verifies formulas →
Sources
- Patterson, D. A., & Hennessy, J. L. (2020). Computer Organization and Design (RISC-V ed.). Morgan Kaufmann, chapter 3 (arithmetic for computers).
- IEEE Std 754-2019, background on binary representations of numbers.
- ISO 80000-2:2019, clause 13 (binary number notation).
Frequently asked questions
Why does register width matter?
It sets how many bits are available to store the result. An 8-bit register can hold unsigned values 0–255; anything larger overflows and the extra high bits are discarded, just as in real hardware.
How do I read a negative number in two's complement?
If the leading bit is 1, the value is negative: flip every bit, add 1, and that gives the binary magnitude — then negate. E.g. in 8 bits, 11111011 flips to 00000100, +1 = 00000101 = 5, so 11111011 represents −5.
What's the difference between LSR and ASR?
LSR (logical shift right) always fills the vacated high bit with 0, treating the value as unsigned. ASR (arithmetic shift right) fills it by copying the sign bit, so a negative two's-complement number stays negative — equivalent to floor division by a power of two.
Why does 1111 + 0001 overflow in a 4-bit register?
1111 (15) + 1 = 16 = 10000 in binary, which needs 5 bits. A 4-bit register can't hold it, so the leading 1 is dropped, leaving 0000 and an overflow/carry flag — the same "wraps to zero" behavior real 4-bit hardware shows.
Can I enter more bits than the register width?
You can, but the value is masked (truncated) to the chosen width before the operation runs, matching what happens when a value doesn't fit in a real register.
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